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  MP1474 high-efficiency, 2a, 16v, 500khz synchronous, step-down converter MP1474 rev. 1.0 www.monolithicpower.com 1 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the MP1474 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a very compact solution to achieve a 2a continuous output current with excellent load and line regulation over a wide input supply range. the MP1474 has synchronous mode operation for higher efficiency over the output current load range. current-mode operation provides fast transient response and eases loop stabilization. full protection features include over-current protection and thermal shut down. the MP1474 requires a minimal number of readily-available standard external components, and is available in a space-saving 8-pin tsot23 package. features ? wide 4.5v-to-16v operating input range ? 100m ? /40m ? low r ds(on) internal power mosfets ? high-efficiency synchronous mode operation ? fixed 500khz switching frequency ? synchronizes from a 200khz-to-2mhz external clock ? power-save mode at light load ? internal soft-start ? power good indicator ? ocp protection and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in an 8-pin tsot-23 package applications ? notebook systems and i/o power ? digital set-top boxes ? flat-panel television and monitors ? distributed power systems a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithi c power systems, inc. typical application MP1474 in en/sync vcc pg gnd fb sw bst vin en/ sync c5 0.1 r1 40.2k r2 13k r5 100k l1 c2 47 c4 c1 4.5v-16v 3.3v/2a 22 2 6 7 1 5 3 8 4 r6 16k r3 20 output current (a) efficiency vs. output current v out =3.3v, i out =0.01a-2a 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =16v v in =12v v in =5v
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 2 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking MP1474dj tsot-23-8 adk * for tape & reel, add suffix ?z (e.g. MP1474dj?z); for rohs compliant packaging, add suffix ?lf (e.g. MP1474dj?lf?z) package reference pg in sw gnd fb vcc en/sync bst 1 2 3 4 8 7 6 5 top view absolute maxi mum ratings (1) v in .................................................. -0.3v to 17v v sw ...................................................................... -0.3v (-5v for <10ns) to 17v (19v for <10ns) v bst ........................................................ v sw +6v all other pins ................................ -0.3v to 6v (2) continuous power dissipation (t a = +25c) (3) ........................................................... 1.25w junction temperature ............................... 150c lead temperature .................................... 260c storage temperature ................. -65c to 150c recommended operating conditions (4) supply voltage v in ........................... 4.5v to 16v output voltage v out ..................... 0.8v to v in -3v operating junction temp. (t j ). -40c to +125c thermal resistance (5) ja jc tsot-23-8 ............................. 100 ..... 55 ... c/w notes: 1) exceeding these ratings may damage the device. 2) about the details of en pin?s abs max rating, please refer to page 9, enable/sync control section. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 3 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics (6) v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v 7 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.6 1 ma hs switch-on resistance hs rds-on v bst-sw =5v 100 m ? ls switch-on resistance ls rds-on v cc =5v 40 m ? switch leakage sw lkg v en = 0v, v sw =12v 1 a current limit ( 6 ) i limit under 40% duty cycle 3 a oscillator frequency f sw v fb =0.75v 430 500 570 khz fold-back frequency f fb v fb <400mv 0.25 f sw maximum duty cycle d max v fb =700mv 90 95 % minimum on time (6) on min 40 ns sync frequency range f sync 0.2 2 mhz feedback voltage v fb t a =25c 791 807 823 mv -40c MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 4 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical characteristics v in = 12v, v out = 3.3v, l=5.5 h, t a = 25c, unless otherwise noted. 4 6 8 10 12 14 16 18 input voltage(v) 2.5 2.8 3.1 3.4 3.7 4 4.3 25 30 35 40 45 50 55 60 65 70 75 load regulation v in =5-16v, i out =0-2a peak current vs. duty cycle disabled supply current vs. input voltage v en =0v enabled supply current vs. input voltage v fb =1v line regulation v in =5v-16v output current (a) input voltage(v) peak current (a) input voltage(v) -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0 0.4 0.8 1.2 1.6 2 v in =12v v in =16v v in =5v -0.5 -0.3 -0.1 0.1 0.3 0.5 5678910111213141516 i out =0a i out =1a i out =2a -10 -7 -4 -1 2 5 8 11 14 17 20 0 5 10 15 20 400 450 500 550 600 650 700 750 800
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 5 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=5.5 h, t a = 25c, unless otherwise noted. output current (a) output current (a) output current (a) short recovery i out =0a startup through enable i out =0a short entry i out =0a output current (a) output current (a) 0 3 6 9 12 15 18 00.511.52 output current (a) case temperature rise vs. output current i out =0a-2a 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =5v v in =12v v in =16v 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =5v v in =12v v in =16v 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =5v v in =12v v in =16v 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =16v v in =12v 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 v in =7v v in =12v v in =16v v out 2v/div. v pg 5v/div. v sw 10v/div. v in 10v/div. i inductor 5a/div. v out 2v/div. v pg 5v/div. v sw 10v/div. v in 10v/div. i inductor 5a/div. v out 2v/div. v pg 5v/div. v sw 10v/div. v en 5v/div. i inductor 2a/div. v in =5v
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 6 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=5.5 h, t a = 25c, unless otherwise noted. startup through enable i out =2a shutdown through enable i out =0a shutdown through enable i out =2a startup through input voltage i out =0a startup through input voltage i out =2a shutdown through input voltage i out =0a shutdown through input voltage i out =2a input / output ripple i out =2a v sw 10v/div. i out 1a/div. v in/ ac 200mv/div. v out /ac 20mv/div. v out /ac 50mv/div. i l 2a/div. v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. load transient reponse i out =1a-2a
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 7 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions package pin # name description 1 pg power good output. the output of this pin is an open drain that goes high if the output voltage exceeds 90% of the normal voltage. there is a 0.4ms delay between when fb 90% to when the pg pin goes high. 2 in supply voltage. the in pin supplies power for internal mosfet and regulator. the MP1474 operates from a +4.5v to +16v input rail. requires a low-esr, and low- inductance capacitor (c1) to decouple the input rail. place the input capacitor very close to this pin and connect it with wide pcb traces and multiple vias. 3 sw switch output. connect to the inductor and boot strap capacitor. this pin is driven up to v in by the high-side switch during the pwm duty cy cle on time. the inductor current drives the sw pin negative during the off time. the on resistance of the low-side switch and the internal body diode fixes the negative voltage. connect using wide pcb traces and multiple vias. 4 gnd system ground. reference ground of the regul ated output voltage. pcb layout requires extra care. for best results, connect to gnd with copper and vias. 5 bst bootstrap. requires a capacit or connected between sw and bst pins to form a floating supply across the high-side switch driver. 6 en/sync enable. en=high to enable the MP1474. appl y an external clock change the switching frequency. for automatic start-up, connect en pin to v in with a 100k ? resistor. 7 vcc internal 5v ldo output. powers the driver and control circuits. decouple with 0.1 f-to- 0.22 f capacitor. do not use a capacitor 0.22 f. 8 fb feedback. connect to the tap of an external resistor divider from the output to gnd to set the output voltage. the frequency fold-back comparator lowers the oscillator frequency when the fb voltage is below 400mv to prevent current limit runaway during a short circuit fault. place the resistor divider as close to t he fb pin as possible. avoid placing vias on the fb traces.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 8 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. functional block diagram 50pf 1meg 6.5v bst rsen in oscillator vcc regulator bootstrap regulator vcc currrent sense amplifer vcc current limit comparator error amplifier ref reference en/sync fb + + + - - + - + - pg sw gnd ls driver hs driver comparator on time control logic control 1pf 400k figure 1: functional block diagram
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 9 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation the MP1474 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a very compact solution that achieves a 2a continuous output current with excellent load and line regulation over a wide input supply range. the MP1474 operates in a fixed-frequency, peak-current?control mode to regulate the output voltage. an internal clock initiates a pwm cycle. the integrated high-side power mosfet turns on and remains on until the current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, within 95% of one pwm period, the current in the power mosfet does not reach the value set by the comp value, the power mosfet is forced off. internal regulator a 5v internal regulator powers most of the internal circuitries. this regulator takes v in and operates in the full v in range. when v in exceeds 5.0v, the output of the regulator is in full regulation. when v in is less than 5.0v, the output decreases, and the part requires a 0.1f ceramic decoupling capacitor. error amplifier the error amplifier compares the fb pin voltage to the internal 0.807v reference (v ref ) and outputs a current proportional to the difference between the two. this output current then charges or discharges the internal compensation network to form the comp voltage, which controls the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. enable/sync control en/sync is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator; drive it low to turn it off. an internal 1m ? resistor from en/sync to gnd allows en/sync to be floated to shut down the chip. the en pin is clamped internally using a 6.5v series-zener-diode as shown in figure 2. connecting the en input pin through a pullup resistor to the voltage on the in pin limits the en input current to less than 100a. for example, with 12v connected to in, r pullup (12v ? 6.5v) 100a = 55k ? . connecting the en pin is directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to 6v to prevent damage to the zener diode. figure 2: 6.5v zener diode connection for external clock synchronization, connect a clock with a frequency range between 200khz and 2mhz 2ms after the output voltage is set: the internal clock rising edge will synchronize with the external clock rising edge. select an external clock signal with a pulse width less than 1.7 s. under-voltage lockout (uvlo) the MP1474 has under-voltage lock-out protection (uvlo). when the vcc voltage exceeds the uvlo rising threshold voltage, the MP1474 powers up. it shuts off when the vcc voltage drops below the uvlo falling threshold voltage. this is non-latch protection. the MP1474 is disabled when the input voltage falls below 3.25v. if an application requires a higher under-voltage lockout (uvlo) threshold, use the en pin as shown in figure 3 to adjust the input voltage uvlo by using two external resistors. for best results, set the uvlo falling threshold (vstop) above 4.5v using the enable resistors. set the rising threshold (vstart) to provide enough hysteresis to allow for any input supply variations.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 10 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. figure 3 : adjustable uvlo internal soft-start the soft-start prevents the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft-start voltage (v ss ) that ramps up from 0v to 1.2v. when v ss is less than v ref , the error amplifier uses v ss as the reference. when v ss exceeds v ref , the error amplifier uses v ref as the reference. the ss time is internally set to 1.2ms. power good indicator MP1474 has an open drain pin as the power- good indicator (pg). pull this up to vcc or another external source through a 100k ? resistor. when v fb exceeds 90% of v ref , pg switches goes high with 0.4ms delay time. if v fb goes below 85% of v ref , an internal mosfet pulls the pg pin down to ground. the internal circuit keeps the pg low once the input supply exceeds 1.2v. over-current-protection and hiccup the MP1474 has a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current limit threshold. meanwhile, the output voltage drops until v fb is below the under-voltage (uv) threshold? typically 50% below the reference. once uv is triggered, the MP1474 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the output is dead-shorted to ground, and greatly reduces the average short circuit current to alleviate thermal issues and protect the regulator. the MP1474 exits the hiccup mode once the over- current condition is removed. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the silicon die reaches temperatures that exceed 150c, it shuts down the whole chip. when the temperature drops below its lower threshold, typically 130c, the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m1, r3, c4, l1 and c2 (figure 4). if (v in - v sw ) exceeds 5v, u1 will regulate m1 to maintain a 5v bst voltage across c4. a 20 ? resistor placed between sw and bst cap. is strongly recommended to reduce sw spike voltage. v in d1 5v m1 u1 bst c4 sw l1 v out c2 r3 figure 4: internal bootstrap charging circuit startup and shutdown if both v in and v en exceed their respective thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides a stable supply for the remaining circuitries. three events can shut down the chip: v en low, v in low, and thermal shutdown. during the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 11 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. application information setting the output voltage the external resistor divider sets the output voltage (see typical application on page 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). choose r1 around 40k ? . r2 is then given by: out r1 r2 v 1 0.807v ? ? the t-type network?as shown in figure 5?is highly recommended when v out is low. rt fb 8 r2 r1 cf vout figure 5: t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1: resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) cf(pf) l( h) 1.0 20.5 84.5 82 15 2.2 1.2 30.1 61.9 82 15 2.2 1.8 40.2 32.4 33 15 4.7 2.5 40.2 19.1 33 15 4.7 3.3 40.2 13 16 15 5.5 5 40.2 7.68 16 15 5.5 selecting the inductor use a1h-to-10h inductor with a dc current rating of at least 25% percent higher than the maximum load current for most applications. for highest efficiency, use an inductor with a dc resistance less than 15m ? . for most designs, the inductance value can be derived from the following equation. out in out 1 in l osc v(vv) l vif ?? ? ?? ? where i l is the inductor ripple current. choose the inductor ripple current to be approximately 30% of the maximum load current. the maximum inductor peak current is: 2 i i i l load ) max ( l ? ? ? use a larger inductor for improved efficiency under light-load conditions?below 100ma. selecting the input capacitor the input current to the step-down converter is discontinuous, therefore requires a capacitor is to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. use ceramic capacitors with x5r or x7r dielectrics for best results because of their low esr and small temperature coefficients. for most applications, use a 22f capacitor. since c1 absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? ? ? ? in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c ? for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, add a small, high quality ceramic capacitor (e.g. 0.1 f) placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated as: load out out in in sin iv v v1 fc1v v ?? ?? ? ?? ?? ? ??
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 12 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low- esr electrolytic capacitors. for best results, use low esr capacitors to keep the output voltage ripple low. the output voltage ripple can be estimated as: out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? ?? ?? ? ? ?? ?? ??? ?? ?? where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. for simplification, the output voltage ripple can be estimated as: out out out 2 in s1 vv v1 v 8f l c2 ?? ??? ?? ??? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated as: out out out esr in s1 vv v1r fl v ?? ???? ?? ? ?? the characteristics of the output capacitor also affect the stability of the regulation system. the MP1474 can be optimized for a wide range of capacitance and esr values. external bootstrap diode an external bootstrap diode can enhance the efficiency of the regulator given the following conditions: ? v out is 5v or 3.3v; and ? duty cycle is high: d= in out v v >65% in these cases, add an external bst diode from the vcc pin to bst pin, as shown in figure 6. sw bst MP1474 c l bst c out external bst diode vcc in4148 figure 6: optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst capacitor value is 0.1f to 1 f.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 13 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pc board layout (8) pcb layout is very important to achieve stable operation especially for vcc capacitor and input capacitor placement. for best results, follow these guidelines: 1. use large ground plane directly connect to gnd pin. add vias near the gnd pin if bottom layer is ground plane. 2. place the vcc capacitor to vcc pin and gnd pin as close as possible. make the trace length of vcc pin-vcc capacitor anode-vcc capacitor cathode-chip gnd pin as short as possible. 3. place the ceramic input capacitor close to in and gnd pins. keep the connection of input capacitor and in pin as short and wide as possible. 4. route sw, bst away from sensitive analog areas such as fb. it?s not recommended to route sw, bst trace under chip?s bottom side. 5. place the t-type feedback resistor r6 close to chip to ensure the trace which connects to fb pin as short as possible notes: 8) the recommended layout is based on the figure 7 typical application circuit on the next page. design example below is a design example following the application guidelines for the specifications: table 2: design example v in 12v v out 3.3v io 2a the detailed application schematic is shown in figure 8. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets.
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 14 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application circuits vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 5.5uh l1 40.2k r1 7.68k r2 gnd gnd 16k r6 5v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 7: 12v in , 5v/2a output vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 5.5uh l1 40.2k r1 13k r2 gnd gnd 16k r6 3.3v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 8: 12v in , 3.3v/2a output vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 4.7uh l1 40.2k r1 19.1k r2 gnd gnd 33k r6 2.5v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 9: 12v in , 2.5v/2a output
MP1474 ? synchronous step-down converter MP1474 rev. 1.0 www.monolithicpower.com 15 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 4.7uh l1 40.2k r1 32.4k r2 gnd gnd 33k r6 1.8v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 10: 12v in , 1.8v/2a output vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 2.2uh l1 30.1k r1 61.9k r2 gnd gnd 82k r6 1.2v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 11: 12v in , 1.2v/2a output vcc 25v c1a 22uf 0.1uf c1 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 2.2uh l1 20.5k r1 84.5k r2 gnd gnd 82k r6 1v/2a MP1474 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 12: 12v in , 1v/2a output
MP1474 ? synchronous step-down converter with internal mosfets notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP1474 rev. 1.0 www.monolithicpower.com 16 9/26/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information tsot23-8


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